HEF4017BT,653-NEXPERIA-Decade Counter, 30 MHz, 1 Gate, 1 Input, 3 V to 15 V, SOIC-16

The HEF4017BT is a 5-stage Johnson Decade Counter with ten spike-free decoded active high outputs (Q0 to Q9), an active low carry output from the most significant flip-flop (Q5-9), active high and active low clock inputs (CP0, CP1) and an overriding asynchronous master reset input (MR). The counter is advanced by either a low-to-high transition at CP0 while CP1 is low or a high-to-low transition at CP1 while CP0 is high. When cascading counters, the Q5-9 output, which is low while the counter is in states 5, 6, 7, 8, and 9, can be used to drive the CP0 input of the next counter. A high on MR resets the counter to zero (Q0 = Q5-9 = high, Q1 to Q9 = low) independent of the clock inputs (CP0, CP1). Automatic counter code correction is provided by an internal circuit: following any illegal code the counter returns to a proper counting mode within 11 clock pulses. Schmitt's trigger action makes the clock inputs highly tolerant of slower rise and fall times.

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Features:

1. Automatic counter correction
2. Tolerant of slow clock rise and fall times
3. Fully static operation
4. Standardized symmetrical output characteristics
5. Complies with JEDEC standard JESD 13-B

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Package Includes:

1 x HEF4017BT,653-NEXPERIA-Decade Counter, 30 MHz, 1 Gate, 1 Input, 3 V to 15 V, SOIC-16