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74LS109 Dual J-K Positive Edge-Triggered Flip-Flop IC (74109 IC) DIP-16 Package — image 1
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74LS109 Dual J-K Positive Edge-Triggered Flip-Flop IC (74109 IC) DIP-16 Package

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Logic IC for everyday users

The 74LS109 Dual J-K Positive Edge-Triggered Flip-Flop IC (74109 IC) DIP-16 Package is a value-for-money logic ic designed for everyday users. It features IC Type: Flip Flop and Part No.: 74LS109.

₹534
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Total: ₹534
Buying tip: A smart budget buy — solid performance without breaking the bank.
Estimated delivery: 26 Aug9 Sept
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Quick Specs

IC Type: Flip Flop
Part No.: 74LS109
Input Voltage (V): 4.75 to 5.25
No. of Bits: 2
Shipping Weight: 0.001 kg
Shipping Dimensions: 1 × 1 × 1 cm

Ideal For

Everyday convenience
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SKU: robu-1090231Category: Logic IC

About This Product

The 74LS109 Dual J-K Positive Edge-Triggered Flip-Flop IC (74109 IC) DIP-16 Package is a value-for-money logic ic designed for everyday users. It delivers reliable performance at an accessible price.

Key Specifications

  • IC Type: Flip Flop
  • Part No.: 74LS109
  • Input Voltage (V): 4.75 to 5.25 — works with standard household power
  • No. of Bits: 2
  • Shipping Weight: 0.001 kg
  • Shipping Dimensions: 1 × 1 × 1 cm

Why Buy from Pricio?

Pricio sources this product directly, cutting out multiple middlemen. Every order includes free shipping, a 15-day return policy, and secure payment via Razorpay.

The 74LS109 devices contain two independent J-K positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the J and K inputs meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the J and K inputs may be changed without affecting the levels at the outputs. These versatile flip-flops can perform as toggle flip-flops by grounding K and tying J high. They also can perform as D-type flip-flops if J and K are tied together. The 74LS109 is characterized for operation from 0°C to 70°C. The feature of 74LS109 is a package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic DIPs


Note:
  1. Product Images are shown for illustrative purposes only and may differ from the actual product.
  2. For Technical Specifications about the IC go through the Datasheet in the Attachment section.

Package Includes:

1 x 74LS109 Dual J-K Positive Edge-Triggered Flip-Flop IC (74109 IC) DIP-16 Package